L&T Semiconductor Unveils First Three Chip Designs Targeting Indian Markets

L&T Semiconductor Enters Fabless Chip Market with India-Specific Designs

L&T Semiconductor, the fabless chip design unit of engineering and construction conglomerate Larsen & Toubro, has publicly unveiled its first three semiconductor designs at a product showcase in Mumbai. The three chips target electric vehicle charging station controllers, three-phase smart electricity meters, and industrial motor drive controllers, all of which are high-demand applications in India's rapidly growing electronics and clean energy sectors. The announcement marks the transition of L&T Semiconductor from a design-phase company into a commercial product entity, with samples of all three chips delivered to selected OEM evaluation partners and production silicon from overseas foundry partners expected by early 2027.

The Three Chip Designs and Their Applications

The EV charging controller chip is designed for AC and DC wallbox charging stations in the 7kW to 22kW power range, integrating the microcontroller, power measurement, communication stack, and protection circuit functions into a single device. India's EV charging infrastructure is expanding rapidly under government mandates, and the opportunity to replace imported controllers with a domestically designed chip is directly relevant to the PLI-driven electronics manufacturing ecosystem. The smart metering chip targets India's national smart meter rollout programme, which involves deploying hundreds of millions of new electricity meters across the country, and integrates high-accuracy analogue front-end measurement with communication interfaces and tamper detection. The motor drive controller addresses the large installed base and growing new production of industrial motors in Indian manufacturing facilities, where energy efficiency improvement is a regulatory and economic priority.

Investment Scale and Team Composition

L&T Semiconductor's USD 300 million plus investment commitment, drawn from Larsen & Toubro's balance sheet without external funding, is one of the largest corporate self-funded semiconductor design programmes in India's history. The company employs over 500 chip design engineers, recruited from established semiconductor companies including Texas Instruments, Renesas, STMicroelectronics, and NXP India operations, as well as from the cohort of IIT and NIT graduates entering the semiconductor field. The CEO of L&T Semiconductor, Sandeep Kumar, has outlined a target of 15 chip designs in the pipeline by end of 2026, with the three unveiled chips being the first to reach sample readiness. The company intends to tape out chips initially at TSMC and GlobalFoundries before transitioning suitable designs to the Tata Electronics Dholera fab once that facility is qualified.

Competitive Positioning and Revenue Outlook

L&T Semiconductor competes in market segments dominated by STMicroelectronics, Renesas, NXP, and Microchip for microcontrollers and motor controllers, and by specialised meter IC suppliers for smart metering. Its competitive advantages in the Indian market include L&T's established relationships with Indian utilities, EV OEMs, and industrial companies that are existing customers of L&T's broader business, domestic content preferences that favour an Indian-origin chip supplier, and technical support responsiveness that global chip companies struggle to provide for mid-tier Indian customers. The company has indicated it expects its first commercial revenue in fiscal 2027, with a target of reaching profitability within three years of commercial launch as design wins accumulate and volumes scale.